312 search results - page 52 / 63 » Architectural approaches to reduce leakage energy in caches |
TVLSI
2010
14 years 6 months ago
2010
Process-induced variations and sub-threshold leakage in bulk-Si technology limit the scaling of SRAM into sub-32 nm nodes. New device architectures are being considered to improve ...
122
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CODES
2006
IEEE
15 years 5 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
120
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LCN
2003
IEEE
15 years 5 months ago
2003
IEEE
A wireless sensor network is a special kind of ad-hoc network with distributed sensing and processing capability that can be used in a wide range of applications, such as environm...
112
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IESS
2007
Springer
15 years 5 months ago
2007
Springer
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
106
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IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...