312 search results - page 60 / 63 » Architectural approaches to reduce leakage energy in caches |
122
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CLUSTER
2008
IEEE
15 years 1 months ago
2008
IEEE
Efficient intra-node shared memory communication is important for High Performance Computing (HPC), especially with the emergence of multi-core architectures. As clusters continue ...
ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
109
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TC
2010
14 years 10 months ago
2010
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
HPCA
2006
IEEE
16 years 2 days ago
2006
IEEE
Measurements of an off-the-shelf DRAM chip confirm that different cells retain information for different amounts of time. This result extends to DRAM rows, or pages (retention tim...
HICSS
2009
IEEE
15 years 6 months ago
2009
IEEE
Building Automation Systems (BASs) can save building owners money by reducing energy consumption while simultaneously preserving occupant comfort. There are algorithms that optimi...