268 search results - page 46 / 54 » Architectural descriptions for FPGA circuits |
DAC
2004
ACM
16 years 18 days ago
2004
ACM
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
APCCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
— A VLSI hardware architecture for the on-chip implementation of a first-order 3D IIR fully-multiplexed frequencyplanar filter module (FMFPM) is proposed. FMFPMs may be employed ...
113
Voted
FPL
2000
Springer
15 years 3 months ago
2000
Springer
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
IOLTS
2005
IEEE
15 years 5 months ago
2005
IEEE
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...