75 search results - page 14 / 15 » Architecture and Hardware for Scheduling Gigabit Packet Stre... |
ISCAS
1994
IEEE
15 years 1 months ago
1994
IEEE
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
INFOCOM
2007
IEEE
15 years 3 months ago
2007
IEEE
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
MMS
2008
14 years 9 months ago
2008
Due to the increasing deployment of conversational real-time applications like VoIP and videoconferencing, the Internet is today facing new challenges. Low end-to-end delay is a vi...
MOBIHOC
2008
ACM
15 years 9 months ago
2008
ACM
Wireless LAN (WLAN) radios conserve energy by staying in sleep mode. With real-time applications like VoIP, it is not clear how much energy can be saved by this approach since pac...
DAC
2009
ACM
15 years 10 months ago
2009
ACM
In this paper, we present an NoC (Networks-on-Chip) router with an SDRAM-aware flow control. Based on a priority-based arbitration, it schedules packets to improve memory utilizat...