Recent theoretical results in buffer sizing research suggest that core Internet routers can achieve high link utilization, if they are capable of storing only a handful of packets...
Neda Beheshti, Jad Naous, Yashar Ganjali, Nick McK...
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
We propose a new objective for network research: to build a fundamentally different sort of network that can assemble itself given high level instructions, reassemble itself as re...
David D. Clark, Craig Partridge, J. Christopher Ra...
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
This paper describes a reconfigurable architecture based on field-programmable gate-array (FPGA) technology for monitoring and analyzing network traffic at increasingly high networ...
Sherif Yusuf, Wayne Luk, Morris Sloman, Naranker D...