76 search results - page 2 / 16 » Area Efficient Architectures for Information Integrity in Ca... |
HPCA
2003
IEEE
14 years 6 months ago
2003
IEEE
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
SEUS
2009
IEEE
14 years 1 months ago
2009
IEEE
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...
VLSID
2008
IEEE
14 years 6 months ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
DSD
2008
IEEE
13 years 8 months ago
2008
IEEE
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
CF
2006
ACM
13 years 10 months ago
2006
ACM
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...