In the past decades, many formal frameworks (e.g. timed automata and temporal logics) and techniques (e.g. model checking and theorem proving) have been proposed to model a real-ti...
Jinfeng Huang, Marc Geilen, Jeroen Voeten, Henk Co...
This paper illustrates a technique for specifying the detailed timing, logical operation, and compositional circuit design of digital circuits in terms of ordinary state machines w...
Deterministic graph grammars generate regular graphs, that form a structural extension of configuration graphs of pushdown systems. In this paper, we study a probabilistic extensio...
We present a runtime verification framework for Java programs. Properties can be specified in Linear-time Temporal Logic (LTL) over AspectJ pointcuts. These properties are checked...
This paper proposes a SPICE model development methodology for quantum-dot cellular automata (QCA) cells and presents a SPICE model for QCA cells. The model is validated by simulat...