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» Automated test generation for industrial Erlang applications
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DAC
2000
ACM
16 years 24 days ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy
3DGIS
2006
Springer
15 years 5 months ago
Texture Generation and Mapping Using Video Sequences for 3D Building Models
Abstract Three-dimensional (3D) building model is one of the most important components in a cyber city implementation and application. This study developed an effective and highly ...
Fuan Tsai, Cheng-Hsuan Chen, Jin-Kim Liu, Kuo-Hsin...
BIOINFORMATICS
2005
89views more  BIOINFORMATICS 2005»
14 years 11 months ago
Doelan: a solution for quality control monitoring of microarray production
: Doelan is an automated tool to check the quality of produced DNA microarrays. This software is based on the execution of test suites on quality control data to validate batches o...
Laurent Jourdren, Stéphane Le Crom
DAC
2000
ACM
16 years 24 days ago
Embedded hardware and software self-testing methodologies for processor cores
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, ...
ISMVL
2007
IEEE
92views Hardware» more  ISMVL 2007»
15 years 6 months ago
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
Stephan Eggersglüß, Daniel Tille, G&oum...