365 search results - page 70 / 73 » Automatic Performance Debugging of SPMD Parallel Programs |
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
HPCA
2009
IEEE
15 years 4 months ago
2009
IEEE
While parallelism and multi-cores are receiving much attention as a major scalability path, customization is another, orthogonal and complementary, scalability path which can targ...
HPCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
108
click to vote
ISCA
2011
IEEE
14 years 1 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
ICS
2009
Tsinghua U.
15 years 2 months ago
2009
Tsinghua U.
Modern GPUs offer much computing power at a very modest cost. Even though CUDA and other related recent developments are accelerating the use of GPUs for general purpose applicati...