302 search results - page 5 / 61 » Automatic Verification of Timed Circuits |
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
ASYNC
2000
IEEE
15 years 4 months ago
2000
IEEE
AC
2002
Springer
14 years 11 months ago
2002
Springer
103
Voted
DAC
1995
ACM
15 years 3 months ago
1995
ACM
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
DAC
1990
ACM
15 years 3 months ago
1990
ACM
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...