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» Automatic synthesis of the Hardware Software Interface
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CODES
2006
IEEE
15 years 3 months ago
Streamroller: : automatic synthesis of prescribed throughput accelerator pipelines
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
Manjunath Kudlur, Kevin Fan, Scott A. Mahlke
CODES
2001
IEEE
15 years 1 months ago
A practical tool box for system level communication synthesis
This paper presents a practical approach to communication synthesis for hardware/software system specified as tasks communicating through lossless blocking channels. It relies on ...
Denis Hommais, Frédéric Pétro...
ECBS
2005
IEEE
110views Hardware» more  ECBS 2005»
15 years 3 months ago
Synthesis of C++ Software from Verifiable CSPm Specifications
CSP++ is an object-oriented application framework for execution of CSP specifications that have been automatically synthesized into C++ source code by the cspt translator. We desc...
Stephen Doxsee, William B. Gardner
79
Voted
GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
15 years 2 months ago
Mixing ATPG and property checking for testing HW/SW interfaces
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
Alessandro Fin, Franco Fummi, Graziano Pravadelli
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
15 years 3 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh