Sciweavers

4273 search results - page 688 / 855
» Autonomic power and performance management for computing sys...
Sort
View
130
Voted
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
15 years 7 months ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
ICS
2005
Tsinghua U.
15 years 7 months ago
A NUCA substrate for flexible CMP cache sharing
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
ICDCS
1997
IEEE
15 years 6 months ago
Dynamic Light-Weight Groups
The virtual synchrony model for group communication has proven to be a powerful paradigm for building distributed applications. In applications that use a large number of groups, ...
Katherine Guo, Luís Rodrigues
MASCOTS
2003
15 years 3 months ago
Zone-Based Shortest Positioning Time First Scheduling for MEMS-Based Storage Devices
Access latency to secondary storage devices is frequently a limiting factor in computer system performance. New storage technologies promise to provide greater storage densities a...
Bo Hong, Scott A. Brandt, Darrell D. E. Long, Etha...
185
Voted
EWSN
2011
Springer
14 years 5 months ago
The Announcement Layer: Beacon Coordination for the Sensornet Stack
Sensornet protocols periodically broadcast beacons for neighborhood information advertisement, but beacon transmissions are costly when power-saving radio duty cycling mechanisms a...
Adam Dunkels, Luca Mottola, Nicolas Tsiftes, Fredr...