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» BASE: Using Abstraction to Improve Fault Tolerance
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DFT
2003
IEEE
142views VLSI» more  DFT 2003»
15 years 5 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
ISCAPDCS
2001
15 years 1 months ago
Tolerating Transient Faults through an Instruction Reissue Mechanism
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
Toshinori Sato, Itsujiro Arita
FTCS
1993
87views more  FTCS 1993»
15 years 1 months ago
Disk Array Storage System Reliability
Fault tolerance requirements for near term disk array storage systems are analyzed. The excellent reliability provided by RAID Level 5 data organization is seen to be insu cient f...
Walter A. Burkhard, Jai Menon
ICCAD
2008
IEEE
161views Hardware» more  ICCAD 2008»
15 years 8 months ago
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu ...
COOPIS
2002
IEEE
15 years 4 months ago
Reconciling Replication and Transactions for the End-to-End Reliability of CORBA Applications
Abstract. The CORBA standard now incorporates support for reliability through two distinct mechanisms — replication (using the Fault Tolerant CORBA standard) and transactions (us...
Pascal Felber, Priya Narasimhan