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DAC
2009
ACM
15 years 8 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
IEEEPACT
2000
IEEE
15 years 8 months ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
142
Voted
PPDP
1999
Springer
15 years 7 months ago
A Virtual Machine for a Process Calculus
Abstract. Despite extensive theoretical work on process-calculi, virtual machine specifications and implementations of actual computational models are still scarce. This paper pre...
Luís M. B. Lopes, Fernando M. A. Silva, Vas...
HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
15 years 7 months ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
131
Voted
POS
1998
Springer
15 years 7 months ago
Optimizing the Read and Write Barriers for Orthogonal Persistence
Persistent programming languages manage volatile memory as a cache for stable storage, imposing a read barrier on operations that access the cache, and a write barrier on updates ...
Antony L. Hosking, Nathaniel Nystrom, Quintin I. C...