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CODES
2008
IEEE
15 years 6 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
SCAM
2008
IEEE
15 years 6 months ago
CoordInspector: A Tool for Extracting Coordination Data from Legacy Code
—More and more current software systems rely on non trivial coordination logic for combining autonomous services typically running on different platforms and often owned by diffe...
Nuno F. Rodrigues, Luís Soares Barbosa
CODES
2007
IEEE
15 years 6 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
CODES
2007
IEEE
15 years 6 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
MICRO
2007
IEEE
184views Hardware» more  MICRO 2007»
15 years 6 months ago
Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
Michael L. Chu, Rajiv A. Ravindran, Scott A. Mahlk...