686 search results - page 65 / 138 » Benchmarking cerebellar control |
SC
2009
ACM
15 years 6 months ago
2009
ACM
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...
120
click to vote
PPOPP
2006
ACM
15 years 5 months ago
2006
ACM
We investigate a transactional memory runtime system providing scaling and strong consistency for generic C++ and SQL applications on commodity clusters. We introduce a novel page...
TC
2011
14 years 6 months ago
2011
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
DAC
2005
ACM
16 years 26 days ago
2005
ACM
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
OSDI
2008
ACM
16 years 5 days ago
2008
ACM
Deadlock is an increasingly pressing concern as the multicore revolution forces parallel programming upon the average programmer. Existing approaches to deadlock impose onerous bu...