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» Benchmarking weak memory models
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102
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EUROSYS
2007
ACM
15 years 9 months ago
Sealing OS processes to improve dependability and safety
In most modern operating systems, a process is a -protected abstraction for isolating code and data. This protection, however, is selective. Many common mechanisms—dynamic code ...
Galen C. Hunt, Mark Aiken, Manuel Fähndrich, ...
DAC
2010
ACM
15 years 19 days ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
109
Voted
IPPS
2006
IEEE
15 years 6 months ago
A framework to develop symbolic performance models of parallel applications
Performance and workload modeling has numerous uses at every stage of the high-end computing lifecycle: design, integration, procurement, installation and tuning. Despite the trem...
Sadaf R. Alam, Jeffrey S. Vetter
OOPSLA
2010
Springer
14 years 10 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek
MICRO
2003
IEEE
108views Hardware» more  MICRO 2003»
15 years 5 months ago
Reducing Design Complexity of the Load/Store Queue
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
Il Park, Chong-liang Ooi, T. N. Vijaykumar