Sciweavers

675 search results - page 9 / 135
» Biased Range Trees
Sort
View
ASPDAC
2010
ACM
119views Hardware» more  ASPDAC 2010»
14 years 8 months ago
Minimizing clock latency range in robust clock tree synthesis
Wen-Hao Liu, Yih-Lang Li, Hui-Chi Chen
SBCCI
2005
ACM
122views VLSI» more  SBCCI 2005»
15 years 4 months ago
Phase noise performances of a cross-coupled CMOS VCO with resistor tail biasing
The Voltage Controlled Oscillator (VCO) is a fundamental block in RF IC architectures. Today’s wireless communication applications do require a high level of performances from s...
Sergio Gagliolo, Giacomo Pruzzo, Daniele D. Cavigl...
SIP
2007
15 years 3 days ago
Parameter estimation for linear AM/FM sinusoids using frequency domain demodulation
This article deals with the estimation of sinusoidal parameters for non stationary sinusoids. It will be shown that for linear amplitude and frequency modulation only the frequenc...
Axel Röbel
TIT
1998
86views more  TIT 1998»
14 years 10 months ago
A Sequential Decoder for Linear Block Codes with a Variable Bias-Term Metric
—A sequential decoder for linear block codes that performs maximum-likelihood soft-decision decoding is described. The decoder uses a metric computed from a lower bound on the co...
Vladislav Sorokine, Frank R. Kschischang