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» Bounded-lifetime integrated circuits
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DAC
2009
ACM
15 years 10 months ago
Contract-based system-level composition of analog circuits
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
Xuening Sun, Pierluigi Nuzzo, Chang-Ching Wu, Albe...
MSE
2005
IEEE
108views Hardware» more  MSE 2005»
15 years 3 months ago
Tools for In-Circuit Testing of On-Line Content Processing Hardware
Tools have been developed that enable in-circuit testing of content processing hardware. The tools automate test and verification of new circuits using data from a predefined te...
VTS
2000
IEEE
84views Hardware» more  VTS 2000»
15 years 2 months ago
ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of sim...
Hussain Al-Asaad, John P. Hayes
DAC
1996
ACM
15 years 2 months ago
Electromigration Reliability Enhancement via Bus Activity Distribution
: Electromigration induced degradation in integrated circuits has been accelerated by continuous scaling of device dimensions. We present a methodology for synthesizing high-reliab...
Aurobindo Dasgupta, Ramesh Karri
DAC
2005
ACM
14 years 11 months ago
On the need for statistical timing analysis
Traditional corner analysis fails to guarantee a target yield for a given performance metric. However, recently proposed solutions, in the form of statistical timing analysis, whi...
Farid N. Najm