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» Bounded-lifetime integrated circuits
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DATE
2003
IEEE
105views Hardware» more  DATE 2003»
15 years 3 months ago
Approximation Approach for Timing Jitter Characterization in Circuit Simulators
A new computational concept of timing jitter is proposed that is suitable for exploitation in circuit simulators. It is based on the approximation of computed noise characteristic...
Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulya...
VTS
2006
IEEE
101views Hardware» more  VTS 2006»
15 years 3 months ago
Design Optimization for Robustness to Single Event Upsets
Abstract: An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU...
Quming Zhou, Mihir R. Choudhury, Kartik Mohanram
DAC
2004
ACM
15 years 10 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
CEC
2008
IEEE
15 years 4 months ago
Fitness functions for the unconstrained evolution of digital circuits
— This work is part of a project that aims to develop and operate integrated evolvable hardware systems using unconstrained evolution. Experiments are carried out on an evolvable...
Tüze Kuyucu, Martin Trefzer, Andrew J. Greens...
IOLTS
2008
IEEE
91views Hardware» more  IOLTS 2008»
15 years 4 months ago
Physical Demonstration of Polymorphic Self-Checking Circuits
Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose ...
Richard Ruzicka, Lukás Sekanina, Roman Prok...