109 search results - page 18 / 22 » Bounds on Memory Bandwidth in Streamed Computations |
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ARC
2012
Springer
13 years 5 months ago
2012
Springer
Iterative numerical algorithms with high memory bandwidth requirements but medium-size data sets (matrix size ∼ a few 100s) are highly appropriate for FPGA acceleration. This pap...
INFOCOM
2003
IEEE
15 years 2 months ago
2003
IEEE
— Input-queued switches are used extensively in the design of high-speed routers. As switch speeds and sizes increase, the design of the switch scheduler becomes a primary challe...
68
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ISCA
1999
IEEE
15 years 1 months ago
1999
IEEE
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
MIDDLEWARE
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. This paper describes an event dissemination algorithm that impletopic-based publish/subscribe interaction abstraction in mobile ad-hoc networks (MANETs). Our algorithm is...
69
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SPAA
2003
ACM
15 years 2 months ago
2003
ACM
We develop an algorithm for parallel disk sorting, whose I/O cost approaches the lower bound and that guarantees almost perfect overlap between I/O and computation. Previous algor...