Sciweavers

60 search results - page 5 / 12
» Buffer Sizing for 802.11 Based Networks
Sort
View
IPPS
2007
IEEE
15 years 4 months ago
Speculative Flow Control for High-Radix Datacenter Interconnect Routers
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
Cyriel Minkenberg, Mitchell Gusat
VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
15 years 10 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran
CORR
2011
Springer
181views Education» more  CORR 2011»
14 years 4 months ago
Study of Throughput and Delay in Finite-Buffer Line Networks
—In this work, we study the effects of finite buffers on the throughput and delay of line networks with erasure links. We identify the calculation of performance parameters such...
Badri N. Vellambi, Nima Torabkhani, Faramarz Fekri

Publication
196views
16 years 8 months ago
Improving the Performance of TCP over the ATM-UBR service
In this paper we study the design issues in improving TCP performance over the ATM UBR service. ATM-UBR switches respond to congestion by dropping cells when their buffers become f...
Rohit Goyal, Raj Jain, Shiv Kalyanaraman, Sonia Fa...
INFOCOM
2007
IEEE
15 years 4 months ago
Pipelined van Emde Boas Tree: Algorithms, Analysis, and Applications
Abstract— Priority queues are essential for various network processing applications, including per-flow queueing with Quality-of-Service (QoS) guarantees, management of large fa...
Hao Wang, Bill Lin