51 search results - page 5 / 11 » Bus encoding for low-power high-performance memory systems |
FDL
2003
IEEE
15 years 2 months ago
2003
IEEE
With System on Chip low power constraints becoming increasingly important, emphasis is moving to architectural level, optimum memory organisation and system run time management. T...
47
Voted
DAC
2000
ACM
15 years 10 months ago
2000
ACM
SIGMOD
1997
ACM
15 years 1 months ago
1997
ACM
We report the performance of NOW-Sort, a collection of sorting implementations on a Network of Workstations (NOW). We find that parallel sorting on a NOW is competitive to sortin...
81
Voted
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
51
Voted
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...