We report on the development of a new computational framework for efficiently carrying out parallel data redistribution in a limited memory environment. This new library, MADRE (T...
Recent advancements in FPGA technology have allowed manufacturers to place general-purpose processors alongside user-configurable logic gates on a single chip. At first glance, ...
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Abstract Experience with the development and maintenance of large test suites specified using the Testing and Test Control Notation (TTCN-3) has shown that it is difficult to const...
The backbone bond lengths, bond angles, and planarity of a protein are influenced by the backbone conformation (u,w), but no tool exists to explore these relationships, leaving th...
Donald S. Berkholz, Peter B. Krenesky, John R. Dav...