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ICCD
2000
IEEE
103views Hardware» more  ICCD 2000»
15 years 6 months ago
Efficient Place and Route for Pipeline Reconfigurable Architectures
In this paper, we present a fast and eficient compilation methodology for pipeline reconfigurable architectures. Our compiler back-end is much faster than conventional CAD tools, ...
Srihari Cadambi, Seth Copen Goldstein
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 1 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
DATE
2002
IEEE
118views Hardware» more  DATE 2002»
15 years 2 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...
FPL
2008
Springer
96views Hardware» more  FPL 2008»
14 years 11 months ago
Towards benchmarking energy efficiency of reconfigurable architectures
Energy research in reconfigurable architectures often involves legacy benchmarks such as the MCNC benchmarks. These benchmarks, however, are not well-suited for assessing energy c...
Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y....
ERSA
2009
107views Hardware» more  ERSA 2009»
14 years 7 months ago
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
Kenneth C. Rovers, Marcel D. van de Burgwal, Jan K...