869 search results - page 38 / 174 » Cache Architectures for Reconfigurable Hardware |
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
With the rapid growth of computer networks and network infrastructures and increased dependency on the internet to carry out day-to-day activities, it is imperative that the compo...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
SIGMETRICS
1999
ACM
15 years 2 months ago
1999
ACM
This paper examines the feasibility of performing architectural studies with trace sampling for a suite of desktop application traces on Windows NT. This paper makes three contrib...
ISCA
2007
IEEE
15 years 4 months ago
2007
IEEE
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...