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FPL
1999
Springer
80views Hardware» more  FPL 1999»
15 years 2 months ago
An Internet Based Development Framework for Reconfigurable Computing
The paper presents a development framework for the Xputer prototype Map-oriented Machine with Parallel Data Access (MoM-PDA). The MoM-PDA operates as a reconfigurable accelerator t...
Reiner W. Hartenstein, Michael Herz, Ulrich Nageld...
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
15 years 3 months ago
Fast configurable-cache tuning with a unified second-level cache
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
IPPS
2007
IEEE
15 years 4 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
FCCM
1998
IEEE
149views VLSI» more  FCCM 1998»
15 years 2 months ago
Configuration Compression for the Xilinx XC6200 FPGA
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Scott Hauck, Zhiyuan Li, Eric J. Schwabe
IEEEINTERACT
2003
IEEE
15 years 3 months ago
Compiler-Directed Resource Management for Active Code Regions
Recent studies on program execution behavior reveal that a large amount of execution time is spent in small frequently executed regions of code. Whereas adaptive cache management ...
Ravikrishnan Sree, Alex Settle, Ian Bratt, Daniel ...