169 search results - page 25 / 34 » Caching queues in memory buffers |
CF
2010
ACM
15 years 2 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
RTCSA
2007
IEEE
15 years 3 months ago
2007
IEEE
This work is motivated by a strong market demand in the replacement of NOR flash memory with NAND flash memory to cut down the cost in many embedded-system designs, such as mobi...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
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CODES
2004
IEEE
15 years 1 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
MICRO
2000
IEEE
15 years 2 months ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...