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ICASSP
2008
IEEE
15 years 4 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
IPPS
2003
IEEE
15 years 3 months ago
Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
João M. P. Cardoso
138
Voted
IPPS
2007
IEEE
15 years 4 months ago
Incorporating Latency in Heterogeneous Graph Partitioning
Parallel applications based on irregular meshes make use of mesh partitioners for efficient execution. Some mesh partitioners can map a mesh to a heterogeneous computational plat...
Eric E. Aubanel, Xiaochen Wu
INFOCOM
2006
IEEE
15 years 3 months ago
Sleeping Coordination for Comprehensive Sensing Using Isotonic Regression and Domatic Partitions
— We address the problem of energy efficient sensing by adaptively coordinating the sleep schedules of sensor nodes while guaranteeing that values of sleeping nodes can be recov...
Farinaz Koushanfar, Nina Taft, Miodrag Potkonjak
90
Voted
CVPR
2012
IEEE
13 years 3 days ago
Segmentation using superpixels: A bipartite graph partitioning approach
Grouping cues can affect the performance of segmentation greatly. In this paper, we show that superpixels (image segments) can provide powerful grouping cues to guide segmentation...
Zhenguo Li, Xiao-Ming Wu, Shih-Fu Chang