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» Catalyst: A DSIP Design Flow Development in Industry
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INDIASE
2009
ACM
14 years 24 days ago
Instant multi-tier web applications without tears
We describe how development productivity for multi-tier webbased database ‘forms’ oriented applications can be significantly improved using ‘InstantApps’, an interpretive ...
Gautam Shroff, Puneet Agarwal, Premkumar T. Devanb...
CODES
2006
IEEE
14 years 10 days ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 4 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
HPCA
2008
IEEE
14 years 6 months ago
Automated microprocessor stressmark generation
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
Ajay M. Joshi, Lieven Eeckhout, Lizy Kurian John, ...
DAC
2007
ACM
14 years 7 months ago
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...
Zhuo Feng, Peng Li, Yaping Zhan