170 search results - page 30 / 34 » Challenges in Embedded Memory Design and Test |
136
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EUROPAR
2009
Springer
15 years 3 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
113
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BROADNETS
2006
IEEE
15 years 5 months ago
2006
IEEE
In this paper we address three challenges that are present when building and analyzing wireless sensor networks (WSN) as part of ubiquitous computing environment: the need for an ...
ASPLOS
2011
ACM
14 years 3 months ago
2011
ACM
Transiently powered computing devices such as RFID tags, kinetic energy harvesters, and smart cards typically rely on programs that complete a task under tight time constraints be...
DSD
2004
IEEE
15 years 3 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
103
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IPPS
2010
IEEE
14 years 9 months ago
2010
IEEE
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...