Sciweavers

280 search results - page 40 / 56
» Challenges in exploitation of loop parallelism in embedded a...
Sort
View
MICRO
2003
IEEE
95views Hardware» more  MICRO 2003»
15 years 2 months ago
Processor Acceleration Through Automated Instruction Set Customization
Application-specific extensions to the computational capabilities of a processor provide an efficient mechanism to meet the growing performance and power demands of embedded appl...
Nathan Clark, Hongtao Zhong, Scott A. Mahlke
IPPS
2010
IEEE
14 years 7 months ago
Large scale complex network analysis using the hybrid combination of a MapReduce cluster and a highly multithreaded system
Complex networks capture interactions among entities in various application areas in a graph representation. Analyzing large scale complex networks often answers important question...
Seunghwa Kang, David A. Bader
ISSS
2002
IEEE
120views Hardware» more  ISSS 2002»
15 years 2 months ago
Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs
Fast distributed cosimulation is a challenging problem for the embedded system design. The main theme of this paper is to increase simulation speed by reducing the frequency of in...
Soonhoi Ha, Sungchan Kim, Chan-Eun Rhee, Hyunguk J...
93
Voted
CLUSTER
2007
IEEE
15 years 3 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
CODES
2003
IEEE
15 years 2 months ago
Hardware support for real-time operating systems
The growing complexity of embedded applications and pressure on time-to-market has resulted in the increasing use of embedded real-time operating systems. Unfortunately, RTOSes ca...
Paul Kohout, Brinda Ganesh, Bruce L. Jacob