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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
15 years 10 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
122
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NOMS
2008
IEEE
15 years 10 months ago
Optimizing request denial and latency in an agent-based VPN architecture
—Agent-based virtual private networks architecture (ABVA) refers to the environment where a third-party provider runs and administers remote access VPN service for organizations ...
Haiyang Qian, Steve Dispensa, Deep Medhi
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
15 years 10 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
RTSS
2008
IEEE
15 years 10 months ago
Predictable Interrupt Management and Scheduling in the Composite Component-Based System
This paper presents the design of user-level scheduling hierarchies in the Composite component-based system. The motivation for this is centered around the design of a system that...
Gabriel Parmer, Richard West
WCNC
2008
IEEE
15 years 10 months ago
Distributed Energy Efficient Spectrum Access in Wireless Cognitive Radio Sensor Networks
—In this paper, a wireless cognitive radio sensor network is considered, where each sensor node is equipped with cognitive radio and the network is a multi-carrier system operati...
Song Gao, Lijun Qian, Dhadesugoor R. Vaman
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