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59
Voted
ISLPED
1996
ACM
15 years 2 months ago
1996
ACM
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
68
Voted
EURODAC
1994
IEEE
15 years 2 months ago
1994
IEEE
We consider a switch module routing problem for symmetric array FPGAs. The work is motivated by two applications. The rst is that of eciently evaluating switch module designs [8]...
78
Voted
SPDP
1993
IEEE
15 years 2 months ago
1993
IEEE
In PRAM emulations, universal hashing is a well-known method for distributing the address space among memory modules. However, if the memory access patterns of an application ofte...
65
Voted
COCO
1994
Springer
15 years 2 months ago
1994
Springer
Recent results by Toda, Vinay, Damm, and Valiant have shown that the complexity of the determinant is characterized by the complexity of counting the number of accepting computati...
ECOOP
1993
Springer
15 years 2 months ago
1993
Springer
Abstract. We have designed and implemented a type inference algorithm for the Self language. The algorithm can guarantee the safety and disambiguity of message sends, and provide u...