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DAC
1997
ACM
15 years 2 months ago
Power Macromodeling for High Level Power Estimation
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...
Subodh Gupta, Farid N. Najm
DAC
2005
ACM
15 years 10 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
15 years 2 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
IJCNN
2006
IEEE
15 years 3 months ago
Reconstruction of Gene Regulatory Networks from Temporal Microarray Data Using Pattern Recognition Techniques
- Gene regulatory networks allow us to study and understand genes’ roles in biological processes. Among others, regulatory networks help to identify pathway initiator genes and t...
Azhar Salim, Faramarz Valafar
SLIP
2009
ACM
15 years 4 months ago
A pre-placement net length estimation technique for mixed-size circuits
An accurate model for pre-placement wire length estimation can be a useful tool during the physical design of integrated circuits. In this paper, an a priori wire length estimatio...
Bahareh Fathi, Laleh Behjat, Logan M. Rakai