Sciweavers

3395 search results - page 30 / 679
» Circuit-aware architectural simulation
Sort
View
CDES
2009
170views Hardware» more  CDES 2009»
15 years 3 months ago
Benchmarking GPU Devices with N-Body Simulations
Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...
DAC
1996
ACM
15 years 6 months ago
VAMP: A VHDL-Based Concept for Accurate Modeling and Post Layout Timing Simulation of Electronic Systems
This paper presents a new concept for accurate modeling and timing simulationof electronicsystems integrated in a typical VHDL design environment, taking into account the requirem...
Bernhard Wunder, Gunther Lehmann, Klaus D. Mü...
WSC
2001
15 years 3 months ago
YACHTS: yet another cooperative high level architecture training software
The paper proposes a new tool for supporting educational and professional skill development in HLA environment; the application proposed by the authors is devoted to provide a rea...
Agostino G. Bruzzone, Roberto Mosca, Roberto Revet...
WSC
1998
15 years 3 months ago
The DoD High Level Architecture: an update
The High Level Architecture (HLA) provides the specification of a common technical architecture for use across all classes of simulations in the US Department of Defense. It provi...
Judith S. Dahmann, Richard Fujimoto, Richard M. We...
WSC
2001
15 years 3 months ago
T.LoaDS abbreviated systems architecture
The Tactical Logistics Distribution System (T.LoaDS or TLoaDS) is a powerful and flexible simulation application for assessing current or future tactical or sea-based distribution...
Bob Hamber