Sciweavers

96 search results - page 3 / 20
» Clock-Aware Placement for FPGAs
Sort
View
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
13 years 7 months ago
High-quality, deterministic parallel placement for FPGAs on commodity hardware
In this paper, we describe the application of two parallelization strategies to the Quartus II FPGA placer. The first
Adrian Ludwin, Vaughn Betz, Ketan Padalia
TODAES
2002
47views more  TODAES 2002»
13 years 5 months ago
Fast placement approaches for FPGAs
Russell Tessier
FPL
2010
Springer
144views Hardware» more  FPL 2010»
13 years 4 months ago
A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs
Andreas Oetken, Stefan Wildermann, Jürgen Tei...
FPL
2000
Springer
122views Hardware» more  FPL 2000»
13 years 10 months ago
A Placement Algorithm for FPGA Designs with Multiple I/O Standards
State-of-the-art FPGAs possess I/O resources that can be configured to support a wide variety of I/O standards [1]. In such devices, the I/O resources are grouped into banks. One o...
Jason Helge Anderson, Jim Saunders, Sudip Nag, Cha...
ERSA
2006
113views Hardware» more  ERSA 2006»
13 years 7 months ago
A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead
Thermal monitoring of a design plays a vital role to ensure safe and reliable thermal operating conditions. Thermal monitoring by employing thermal sensors is a popular technique ...
Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci...