169 search results - page 31 / 34 » Co-Scheduling Hardware and Software Pipelines |
126
Voted
EMSOFT
2006
Springer
15 years 5 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
120
Voted
PPOPP
2010
ACM
15 years 8 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
147
click to vote
SIGGRAPH
2010
ACM
15 years 6 months ago
2010
ACM
Although there has been much interest in computational photography
within the research and photography communities, progress
has been hampered by the lack of a portable, programm...
123
click to vote
MICRO
2007
IEEE
15 years 8 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
112
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DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...