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» Co-Scheduling Hardware and Software Pipelines
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VMV
2004
80views Visualization» more  VMV 2004»
15 years 3 months ago
Reducing State Changes with a Pipeline Buffer
A limiting factor in the performance of a rendering system is the number of state changes, i.e., changes of the attributes material, texture, shader program, etc., in the stream o...
Jens Krokowski, Harald Räcke, Christian Sohle...
125
Voted
CODES
2006
IEEE
15 years 8 months ago
Streamroller: : automatic synthesis of prescribed throughput accelerator pipelines
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
Manjunath Kudlur, Kevin Fan, Scott A. Mahlke
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
14 years 11 months ago
Scalable Speculative Parallelization on Commodity Clusters
While clusters of commodity servers and switches are the most popular form of large-scale parallel computers, many programs are not easily parallelized for execution upon them. In...
Hanjun Kim, Arun Raman, Feng Liu, Jae W. Lee, Davi...
84
Voted
MIDDLEWARE
2004
Springer
15 years 7 months ago
Data pipelines: enabling large scale multi-protocol data transfers
Collaborating users need to move terabytes of data among their sites, often involving multiple protocols. This process is very fragile and involves considerable human involvement ...
Tevfik Kosar, George Kola, Miron Livny
121
Voted
FPL
2010
Springer
146views Hardware» more  FPL 2010»
14 years 12 months ago
Software Managed Distributed Memories in MPPAs
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
Robin Panda, Jimmy Xu, Scott Hauck