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» CodSim -- A Combined Delay Fault Simulator
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DFT
2003
IEEE
114views VLSI» more  DFT 2003»
13 years 11 months ago
CodSim -- A Combined Delay Fault Simulator
Delay faults are an increasingly important test challenge. Traditional delay fault models are incomplete in that they only model a subset of delay defect behaviors. To solve this ...
Wangqi Qiu, Xiang Lu, Zhuo Li, D. M. H. Walker, We...
ICCAD
1994
IEEE
87views Hardware» more  ICCAD 1994»
13 years 10 months ago
On testing delay faults in macro-based combinational circuits
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...
Irith Pomeranz, Sudhakar M. Reddy
VLSID
1996
IEEE
110views VLSI» more  VLSID 1996»
13 years 10 months ago
On test coverage of path delay faults
W epropose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and ...
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...
CSREASAM
2007
13 years 7 months ago
Intrusion Detection System to Detect Wormhole Using Fault Localization Techniques
— In this paper, we present a strategy to detect an intrusion using fault localization tools. We propose an intrusion detection system to detect a self-contained in-band wormhole...
Maitreya Natu, Adarshpal S. Sethi
ATS
2010
IEEE
229views Hardware» more  ATS 2010»
13 years 4 months ago
Variation-Aware Fault Modeling
Abstract--To achieve a high product quality for nano-scale systems both realistic defect mechanisms and process variations must be taken into account. While existing approaches for...
Fabian Hopsch, Bernd Becker, Sybille Hellebrand, I...