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ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 2 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
120
Voted
IPPS
2007
IEEE
15 years 3 months ago
Software and Algorithms for Graph Queries on Multithreaded Architectures
Search-based graph queries, such as finding short paths and isomorphic subgraphs, are dominated by memory latency. If input graphs can be partitioned appropriately, large cluster...
Jonathan W. Berry, Bruce Hendrickson, Simon Kahan,...
85
Voted
KBSE
2007
IEEE
15 years 3 months ago
Using information retrieval to support design of incremental change of software
The proposed research defines an approach to combine Information Retrieval based analysis of the textual information embedded in software artifacts with program static and dynamic...
Denys Poshyvanyk, Andrian Marcus
WOMPAT
2004
Springer
15 years 2 months ago
Runtime Adjustment of Parallel Nested Loops
OpenMP allows programmers to specify nested parallelism in parallel applications. In the case of scientific applications, parallel loops are the most important source of paralleli...
Alejandro Duran, Raúl Silvera, Julita Corba...
CORR
2004
Springer
125views Education» more  CORR 2004»
14 years 9 months ago
High-Level Networking With Mobile Code And First Order AND-Continuations
We describe a scheme for moving living code between a set of distributed processes coordinated with unification based Linda operations, and its application to building a comprehen...
Paul Tarau, Verónica Dahl