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» Combining optimizations in automated low power design
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DAC
2005
ACM
15 years 10 months ago
Flexible ASIC: shared masking for multiple media processors
ASIC provides more than an order of magnitude advantage in terms of density, speed, and power requirement per gate. However, economic (cost of masks) and technological (deep micro...
Jennifer L. Wong, Farinaz Koushanfar, Miodrag Potk...
CORR
2007
Springer
153views Education» more  CORR 2007»
14 years 9 months ago
Power-Bandwidth Tradeoff in Dense Multi-Antenna Relay Networks
— We consider a dense fading multi-user network with multiple active multi-antenna source-destination pair terminals communicating simultaneously through a large common set of K ...
Ozgur Oyman, Arogyaswami Paulraj
NCA
2007
IEEE
14 years 9 months ago
Ensemble of hybrid neural network learning approaches for designing pharmaceutical drugs
Designing drugs is a current problem in the pharmaceutical research. By designing a drug we mean to choose some variables of drug formulation (inputs), for obtaining optimal charac...
Ajith Abraham, Crina Grosan, Stefan Tigan
DAC
2000
ACM
15 years 10 months ago
The role of custom design in ASIC Chips
Custom design, in which the designer controls the physical structure of the chip, can greatly improve the speed, power, and delay of an ASIC chip without affecting design time. Th...
William J. Dally, Andrew Chang
DAC
1996
ACM
15 years 2 months ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...