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2007
IEEE
15 years 3 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
DATE
2000
IEEE
78views Hardware» more  DATE 2000»
15 years 1 months ago
HW/SW Codesign of an Engine Management System
The design process for an engine management system is presented. The functional specification of the system has been captured using C and C++ as specification languages. The val...
Massimo Baleani, Alberto Ferrari, Alberto L. Sangi...
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
15 years 6 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...
89
Voted
RT
1998
Springer
15 years 1 months ago
Automatic Calculation of Soft Shadow Textures for Fast, High-Quality Radiosity
We propose a new method for greatly accelerating the computation of complex, detailed shadows in a radiosity solution. Radiosity is computed using a "standard" hierarchi...
Cyril Soler, François X. Sillion
81
Voted
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
15 years 4 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...