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DAC
2001
ACM
15 years 10 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
ASPDAC
2008
ACM
168views Hardware» more  ASPDAC 2008»
14 years 11 months ago
A fast two-pass HDL simulation with on-demand dump
- Simulation-based functional verification is characterized by two inherently conflicting targets: the signal visibility and simulation performance. Achieving a proper trade-off be...
Kyuho Shim, Youngrae Cho, Namdo Kim, Hyuncheol Bai...
VLSISP
2011
358views Database» more  VLSISP 2011»
14 years 4 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
ASAP
2006
IEEE
111views Hardware» more  ASAP 2006»
15 years 3 months ago
Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
Yedidya Hilewitz, Ruby B. Lee
FPGA
2009
ACM
273views FPGA» more  FPGA 2009»
15 years 4 months ago
A parallel/vectorized double-precision exponential core to accelerate computational science applications
Many natural processes exhibit exponential decay and, consequently, computational scientists make extensive use of e−x in computer simulation experiments. While it is common to ...
Robin Pottathuparambil, Ron Sass