74 search results - page 10 / 15 » Comparing CPU Performance Between and Within Processor Famil... |
102
click to vote
SC
1995
ACM
15 years 3 months ago
1995
ACM
In this paper we present an analytical-based framework for parallel program performance prediction. The main thrust of this work is to provide a means for treating realistic appli...
MICRO
2006
IEEE
15 years 5 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
137
click to vote
TVLSI
2010
14 years 6 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
HIPEAC
2005
Springer
15 years 5 months ago
2005
Springer
Detecting and predicting a program’s execution phases are crucial to dynamic optimizations and dynamically adaptable systems. This paper shows that a phase can be associated with...