74 search results - page 7 / 15 » Comparing CPU Performance Between and Within Processor Famil... |
MICRO
1998
IEEE
15 years 4 months ago
1998
IEEE
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
CASES
2006
ACM
15 years 3 months ago
2006
ACM
Technology scaling trends have forced designers to consider alternatives to deeply pipelining aggressive cores with large amounts of performance accelerating hardware. One alterna...
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CGO
2004
IEEE
15 years 3 months ago
2004
IEEE
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
ICS
2001
Tsinghua U.
15 years 4 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
HPCA
2002
IEEE
16 years 2 days ago
2002
IEEE
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...