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IEEEPACT
2008
IEEE
15 years 10 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
IEEEPACT
2008
IEEE
15 years 10 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...
IJCNN
2008
IEEE
15 years 10 months ago
Filter Bank Common Spatial Pattern (FBCSP) in Brain-Computer Interface
—In motor imagery-based Brain Computer Interfaces (BCI), discriminative patterns can be extracted from the electroencephalogram (EEG) using the Common Spatial Pattern (CSP) algor...
Kai Keng Ang, Zhang Yang Chin, Haihong Zhang, Cunt...
IPPS
2008
IEEE
15 years 10 months ago
High performance MPEG-2 software decoder on the cell broadband engine
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
David A. Bader, Sulabh Patel
NDSS
2008
IEEE
15 years 10 months ago
Automatic Protocol Format Reverse Engineering through Context-Aware Monitored Execution
Protocol reverse engineering has often been a manual process that is considered time-consuming, tedious and error-prone. To address this limitation, a number of solutions have rec...
Zhiqiang Lin, Xuxian Jiang, Dongyan Xu, Xiangyu Zh...