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» Comparing the Optimal Performance of Parallel Architectures
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MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 9 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
COMPSAC
2008
IEEE
15 years 9 months ago
Parallel Table Lookup for Next Generation Internet
The rapid growth of Internet population leads to the shortage of IP addresses. The next generation IP protocol, IPv6, which extends the IP address length from 32 bits to 128 bits,...
Li-Che Hung, Yaw-Chung Chen
ICASSP
2011
IEEE
14 years 7 months ago
Analog joint source-channel Multiple Description coding scheme over AWGN parallel channels
We propose a low complexity analog joint source channel coding Multiple Description (MD) scheme for transmitting the symbols of a Gaussian source across a pair of independent AWGN...
Aitor Erdozain, Pedro M. Crespo, Baltasar Beferull...
129
Voted
IPPS
2007
IEEE
15 years 9 months ago
Memory Optimizations For Fast Power-Aware Sparse Computations
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
124
Voted
IPPS
2007
IEEE
15 years 9 months ago
POET: Parameterized Optimizations for Empirical Tuning
The excessive complexity of both machine architectures and applications have made it difficult for compilers to statically model and predict application behavior. This observatio...
Qing Yi, Keith Seymour, Haihang You, Richard W. Vu...