Sciweavers

1461 search results - page 131 / 293
» Comparing the Optimal Performance of Parallel Architectures
Sort
View
146
Voted
DSN
2007
IEEE
15 years 9 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
156
Voted
CF
2009
ACM
15 years 10 months ago
Wave field synthesis for 3D audio: architectural prospectives
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
Dimitris Theodoropoulos, Catalin Bogdan Ciobanu, G...
121
Voted
ICS
1989
Tsinghua U.
15 years 7 months ago
Control flow optimization for supercomputer scalar processing
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
Pohua P. Chang, Wen-mei W. Hwu
PPOPP
2003
ACM
15 years 8 months ago
Exploiting high-level coherence information to optimize distributed shared state
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...
DeQing Chen, Chunqiang Tang, Brandon Sanders, Sand...
IPPS
2007
IEEE
15 years 9 months ago
A Cost-Effective, High Bandwidth Server I/O network Architecture for Cluster Systems
In this paper we present a cost-effective, high bandwidth server I/O network architecture, named PaScal (Parallel and Scalable). We use the PaScal server I/O network to support da...
Hsing-bung Chen, Gary Grider, Parks Fields