1461 search results - page 153 / 293 » Comparing the Optimal Performance of Parallel Architectures |
158
Voted
CLUSTER
2008
IEEE
15 years 5 months ago
2008
IEEE
Efficient intra-node shared memory communication is important for High Performance Computing (HPC), especially with the emergence of multi-core architectures. As clusters continue ...
141
Voted
ICPPW
2006
IEEE
15 years 9 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
127
click to vote
IESS
2007
Springer
15 years 9 months ago
2007
Springer
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspecific architectures...
117
click to vote
DAC
2004
ACM
16 years 4 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
124
Voted
ICDCS
1995
IEEE
15 years 7 months ago
1995
IEEE
Protocols that provide reliable communicationon top of a network that can lose packets rely on periodically retransmitting packets. The choice of retransmission timeout critically...